LSECSSF=B_0x0, HSIRDYF=B_0x0, HSIUSB48RDYF=B_0x0, LSERDYF=B_0x0, CSSF=B_0x0, HSERDYF=B_0x0, LSIRDYF=B_0x0
RCC clock interrupt flag register
| LSIRDYF | LSI ready interrupt flag This flag indicates a pending interrupt upon LSE clock getting ready. Set by hardware when the LSI clock becomes stable and LSIRDYDIE is set. Cleared by software setting the LSIRDYC bit. 0 (B_0x0): Interrupt not pending 1 (B_0x1): Interrupt pending |
| LSERDYF | LSE ready interrupt flag This flag indicates a pending interrupt upon LSE clock getting ready. Set by hardware when the LSE clock becomes stable and LSERDYDIE is set. Cleared by software setting the LSERDYC bit. 0 (B_0x0): Interrupt not pending 1 (B_0x1): Interrupt pending |
| HSIUSB48RDYF | HSIUSB48 ready interrupt flag Set by hardware when the HSIUSB48 clock becomes stable and HSIUSB48RDYIE is set as a response to setting HSIUSB48ON (refer to RCC clock control register (RCC_CR)). When HSIUSB48ON is not set but the HSIUSB48 oscillator is enabled by the peripheral through a clock request, this bit is not set and no interrupt is generated. Cleared by software setting the HSIUSB48RDYC bit. Note: Only applicable on STM32C071xx, reserved on other devices. 0 (B_0x0): Interrupt not pending 1 (B_0x1): Interrupt pending |
| HSIRDYF | HSI48 ready interrupt flag This flag indicates a pending interrupt upon HSI48 clock getting ready. Set by hardware when the HSI48 clock becomes stable and HSIRDYIE is set in response to setting the HSION (refer to RCC clock control register (RCC_CR)). When HSION is not set but the HSI48 oscillator is enabled by the peripheral through a clock request, this bit is not set and no interrupt is generated. Cleared by software setting the HSIRDYC bit. 0 (B_0x0): Interrupt not pending 1 (B_0x1): Interrupt pending |
| HSERDYF | HSE ready interrupt flag This flag indicates a pending interrupt upon HSE clock getting ready. Set by hardware when the HSE clock becomes stable and HSERDYIE is set. Cleared by software setting the HSERDYC bit. 0 (B_0x0): Interrupt not pending 1 (B_0x1): Interrupt pending |
| CSSF | HSE clock security system interrupt flag This flag indicates a pending interrupt upon HSE clock failure. Set by hardware when a failure is detected in the HSE oscillator. Cleared by software setting the CSSC bit. 0 (B_0x0): Interrupt not pending 1 (B_0x1): Interrupt pending |
| LSECSSF | LSE clock security system interrupt flag This flag indicates a pending interrupt upon LSE clock failure. Set by hardware when a failure is detected in the LSE oscillator. Cleared by software by setting the LSECSSC bit. 0 (B_0x0): Interrupt not pending 1 (B_0x1): Interrupt pending |