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stm32 /stm32c0 /STM32C071 /RCC /RCC_CRRCR

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Interpret as RCC_CRRCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HSIUSB48CAL

Description

RCC clock recovery RC register

Fields

HSIUSB48CAL

HSIUSB48 clock calibration These bits are initialized at startup with the factory-programmed HSIUSB48 calibration trim value.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32