Regviz

stm32 /stm32c0 /STM32C071 /TIM2 /TIM2_CNT_ALTERNATE1

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Interpret as TIM2_CNT_ALTERNATE1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CNT0 (UIFCPY)UIFCPY

Fields

CNT

Least significant part of counter value
UIFCPY

UIF Copy

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32