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stm32 /stm32f0 /STM32F0x0 /PWR /CSR

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Interpret as CSR

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https://regviz.com/r/stm32/stm32f0/STM32F0x0/PWR/CSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUF)WUF 0 (SBF)SBF 0 (EWUP1)EWUP1 0 (EWUP2)EWUP2 0 (EWUP4)EWUP4 0 (EWUP5)EWUP5 0 (EWUP6)EWUP6 0 (EWUP7)EWUP7

Description

power control/status register

Fields

WUF

Wakeup flag
SBF

Standby flag
EWUP1

Enable WKUP pin 1
EWUP2

Enable WKUP pin 2
EWUP4

Enable WKUP pin 4
EWUP5

Enable WKUP pin 5
EWUP6

Enable WKUP pin 6
EWUP7

Enable WKUP pin 7

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32