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stm32 /stm32f0 /STM32F0x2 /Flash /OBR

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Interpret as OBR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OPTERR)OPTERR 0RDPRT 0 (WDG_SW)WDG_SW 0 (nRST_STOP)nRST_STOP 0 (nRST_STDBY)nRST_STDBY 0 (nBOOT0)nBOOT0 0 (nBOOT1)nBOOT1 0 (VDDA_MONITOR)VDDA_MONITOR 0 (RAM_PARITY_CHECK)RAM_PARITY_CHECK 0 (BOOT_SEL)BOOT_SEL 0Data00Data1

Description

Option byte register

Fields

OPTERR

Option byte error
RDPRT

Read protection level status
WDG_SW

WDG_SW
nRST_STOP

nRST_STOP
nRST_STDBY

nRST_STDBY
nBOOT0

nBOOT0
nBOOT1

BOOT1
VDDA_MONITOR

VDDA_MONITOR
RAM_PARITY_CHECK

RAM_PARITY_CHECK
BOOT_SEL

BOOT_SEL
Data0

Data0
Data1

Data1

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32