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stm32 /stm32f1 /STM32F100 /CEC /ESR

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Interpret as ESR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BTE)BTE 0 (BPE)BPE 0 (RBTFE)RBTFE 0 (SBE)SBE 0 (ACKE)ACKE 0 (LINE)LINE 0 (TBTFE)TBTFE

Description

CEC error status register

Fields

BTE

Bit timing error
BPE

Bit period error
RBTFE

Rx block transfer finished error
SBE

Start bit error
ACKE

Block acknowledge error
LINE

Line error
TBTFE

Tx block transfer finished error

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32