Regviz

stm32 /stm32f1 /STM32F100 /RTC /CRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f1/STM32F100/RTC/CRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SECF)SECF 0 (ALRF)ALRF 0 (OWF)OWF 0 (RSF)RSF 0 (CNF)CNF 0 (RTOFF)RTOFF

Description

RTC Control Register Low

Fields

SECF

Second Flag
ALRF

Alarm Flag
OWF

Overflow Flag
RSF

Registers Synchronized Flag
CNF

Configuration Flag
RTOFF

RTC operation OFF

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32