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stm32 /stm32f1 /STM32F100 /UART5 /CR1

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Interpret as CR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SBK)SBK 0 (RWU)RWU 0 (RE)RE 0 (TE)TE 0 (IDLEIE)IDLEIE 0 (RXNEIE)RXNEIE 0 (TCIE)TCIE 0 (TXEIE)TXEIE 0 (PEIE)PEIE 0 (PS)PS 0 (PCE)PCE 0 (WAKE)WAKE 0 (M)M0 (UE)UE

Description

Control register 1

Fields

SBK

SBK
RWU

RWU
RE

RE
TE

TE
IDLEIE

IDLEIE
RXNEIE

RXNEIE
TCIE

TCIE
TXEIE

TXEIE
PEIE

PEIE
PS

PS
PCE

PCE
WAKE

WAKE
M

M
UE

UE

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32