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stm32 /stm32f1 /STM32F101 /SDIO /ICR

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Interpret as ICR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CCRCFAILC)CCRCFAILC 0 (DCRCFAILC)DCRCFAILC 0 (CTIMEOUTC)CTIMEOUTC 0 (DTIMEOUTC)DTIMEOUTC 0 (TXUNDERRC)TXUNDERRC 0 (RXOVERRC)RXOVERRC 0 (CMDRENDC)CMDRENDC 0 (CMDSENTC)CMDSENTC 0 (DATAENDC)DATAENDC 0 (STBITERRC)STBITERRC 0 (DBCKENDC)DBCKENDC 0 (SDIOITC)SDIOITC 0 (CEATAENDC)CEATAENDC

Description

SDIO interrupt clear register (SDIO_ICR)

Fields

CCRCFAILC

CCRCFAILC
DCRCFAILC

DCRCFAILC
CTIMEOUTC

CTIMEOUTC
DTIMEOUTC

DTIMEOUTC
TXUNDERRC

TXUNDERRC
RXOVERRC

RXOVERRC
CMDRENDC

CMDRENDC
CMDSENTC

CMDSENTC
DATAENDC

DATAENDC
STBITERRC

STBITERRC
DBCKENDC

DBCKENDC
SDIOITC

SDIOITC
CEATAENDC

CEATAENDC

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32