stm32 /stm32f1 /STM32F107 /DBG /CR

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Interpret as CR

31282724232019161512118743000000000000000000000000000000000000000000 (DBG_SLEEP)DBG_SLEEP0 (DBG_STOP)DBG_STOP0 (DBG_STANDBY)DBG_STANDBY0 (TRACE_IOEN)TRACE_IOEN0TRACE_MODE0 (DBG_IWDG_STOP)DBG_IWDG_STOP0 (DBG_WWDG_STOP)DBG_WWDG_STOP0 (DBG_TIM1_STOP)DBG_TIM1_STOP0 (DBG_TIM2_STOP)DBG_TIM2_STOP0 (DBG_TIM3_STOP)DBG_TIM3_STOP0 (DBG_TIM4_STOP)DBG_TIM4_STOP0 (DBG_CAN1_STOP)DBG_CAN1_STOP0 (DBG_I2C1_SMBUS_TIMEOUT)DBG_I2C1_SMBUS_TIMEOUT0 (DBG_I2C2_SMBUS_TIMEOUT)DBG_I2C2_SMBUS_TIMEOUT0 (DBG_TIM5_STOP)DBG_TIM5_STOP0 (DBG_TIM6_STOP)DBG_TIM6_STOP0 (DBG_TIM7_STOP)DBG_TIM7_STOP0 (DBG_CAN2_STOP)DBG_CAN2_STOP

Description

DBGMCU_CR

Fields

DBG_SLEEP

DBG_SLEEP

DBG_STOP

DBG_STOP

DBG_STANDBY

DBG_STANDBY

TRACE_IOEN

TRACE_IOEN

TRACE_MODE

TRACE_MODE

DBG_IWDG_STOP

DBG_IWDG_STOP

DBG_WWDG_STOP

DBG_WWDG_STOP

DBG_TIM1_STOP

DBG_TIM1_STOP

DBG_TIM2_STOP

DBG_TIM2_STOP

DBG_TIM3_STOP

DBG_TIM3_STOP

DBG_TIM4_STOP

DBG_TIM4_STOP

DBG_CAN1_STOP

DBG_CAN1_STOP

DBG_I2C1_SMBUS_TIMEOUT

DBG_I2C1_SMBUS_TIMEOUT

DBG_I2C2_SMBUS_TIMEOUT

DBG_I2C2_SMBUS_TIMEOUT

DBG_TIM5_STOP

DBG_TIM5_STOP

DBG_TIM6_STOP

DBG_TIM6_STOP

DBG_TIM7_STOP

DBG_TIM7_STOP

DBG_CAN2_STOP

DBG_CAN2_STOP

Links

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