Regviz

stm32 /stm32f1 /STM32F107 /UART5 /DR

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Interpret as DR

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https://regviz.com/r/stm32/stm32f1/STM32F107/UART5/DR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DR

Description

UART5 DR

Fields

DR

DR

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32