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stm32 /stm32f3 /STM32F301 /ADC /OFR1

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Interpret as OFR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OFFSET10OFFSET1_CH0 (OFFSET1_EN)OFFSET1_EN

Description

ADC offset register1

Fields

OFFSET1

Data offset 1 for the channel programmed into bits OFFSET1_CH
OFFSET1_CH

Channel selection for the Data offset 1
OFFSET1_EN

Offset1 Enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32