Regviz

stm32 /stm32f3 /STM32F301 /ADC /SQR2

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Interpret as SQR2

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https://regviz.com/r/stm32/stm32f3/STM32F301/ADC/SQR2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SQ50SQ60SQ70SQ80SQ9

Description

ADC regular sequence register 2

Fields

SQ5

5th conversion in regular sequence
SQ6

6th conversion in regular sequence
SQ7

7th conversion in regular sequence
SQ8

8th conversion in regular sequence
SQ9

9th conversion in regular sequence

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32