Regviz

stm32 /stm32f3 /STM32F301 /ADC /SQR4

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Interpret as SQR4

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SQ150SQ16

Description

ADC regular sequence register 4

Fields

SQ15

15th conversion in regular sequence
SQ16

16th conversion in regular sequence

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32