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stm32 /stm32f3 /STM32F303 /ADC1 /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADEN)ADEN 0 (ADDIS)ADDIS 0 (ADSTART)ADSTART 0 (JADSTART)JADSTART 0 (ADSTP)ADSTP 0 (JADSTP)JADSTP 0ADVREGEN 0 (ADCALDIF)ADCALDIF 0 (ADCAL)ADCAL

Description

control register

Fields

ADEN

ADEN
ADDIS

ADDIS
ADSTART

ADSTART
JADSTART

JADSTART
ADSTP

ADSTP
JADSTP

JADSTP
ADVREGEN

ADVREGEN
ADCALDIF

ADCALDIF
ADCAL

ADCAL

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32