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stm32 /stm32f3 /STM32F373 /SDADC1 /CLRISR

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Interpret as CLRISR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLREOCALF)CLREOCALF 0 (CLRJOVRF)CLRJOVRF 0 (CLRROVRF)CLRROVRF

Description

interrupt and status clear register

Fields

CLREOCALF

Clear the end of calibration flag
CLRJOVRF

Clear the injected conversion overrun flag
CLRROVRF

Clear the regular conversion overrun flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32