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stm32 /stm32f3 /STM32F373 /SDADC1 /CONF1R

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Interpret as CONF1R

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OFFSET10GAIN10SE10COMMON1

Description

configuration 1 register

Fields

OFFSET1

Twelve-bit calibration offset for configuration 1
GAIN1

Gain setting for configuration 1
SE1

Single-ended mode for configuration 1
COMMON1

Common mode for configuration 1

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32