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stm32 /stm32f4 /STM32F410 /PWR /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUF)WUF 0 (SBF)SBF 0 (PVDO)PVDO 0 (BRR)BRR 0 (EWUP3)EWUP3 0 (EWUP2)EWUP2 0 (EWUP1)EWUP1 0 (BRE)BRE 0 (VOSRDY)VOSRDY

Description

power control/status register

Fields

WUF

Wakeup flag
SBF

Standby flag
PVDO

PVD output
BRR

Backup regulator ready
EWUP3

Enable WKUP3 pin
EWUP2

Enable WKUP2 pin
EWUP1

Enable WKUP1 pin
BRE

Backup regulator enable
VOSRDY

Regulator voltage scaling output selection ready bit

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32