Regviz

stm32 /stm32f4 /STM32F412 /I2C3 /SR2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SR2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32f4/STM32F412/I2C3/SR2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MSL)MSL 0 (BUSY)BUSY 0 (TRA)TRA 0 (GENCALL)GENCALL 0 (SMBDEFAULT)SMBDEFAULT 0 (SMBHOST)SMBHOST 0 (DUALF)DUALF 0PEC

Description

Status register 2

Fields

MSL

Master/slave
BUSY

Bus busy
TRA

Transmitter/receiver
GENCALL

General call address (Slave mode)
SMBDEFAULT

SMBus device default address (Slave mode)
SMBHOST

SMBus host header (Slave mode)
DUALF

Dual flag (Slave mode)
PEC

acket error checking register

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32