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stm32 /stm32f4 /STM32F412 /RCC /DCKCFGR2

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Interpret as DCKCFGR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0I2CFMP1SEL 0 (CK48MSEL)CK48MSEL 0 (CKSDIOSEL)CKSDIOSEL

Description

Dedicated Clocks Configuration Register

Fields

I2CFMP1SEL

I2CFMP1 kernel clock source selection
CK48MSEL

SDIO/USBFS clock selection
CKSDIOSEL

SDIO clock selection

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32