Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32h7/STM32H723/OTG1_HS_HOST/OTG_HS_HAINT#0x0
OTG_HS Host all channels interrupt register
Channel interrupts
https://github.com/modm-io/cmsis-svd-stm32