Regviz

stm32 /stm32f7 /STM32F730 /DAC /SR

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Interpret as SR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMAUDR1)DMAUDR1 0 (DMAUDR2)DMAUDR2

Description

status register

Fields

DMAUDR1

DAC channel1 DMA underrun flag
DMAUDR2

DAC channel2 DMA underrun flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32