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stm32 /stm32g0 /STM32G030 /RCC /CIFR

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Interpret as CIFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSIRDYF)LSIRDYF 0 (LSERDYF)LSERDYF 0 (HSIRDYF)HSIRDYF 0 (HSERDYF)HSERDYF 0 (PLLSYSRDYF)PLLSYSRDYF 0 (CSSF)CSSF 0 (LSECSSF)LSECSSF

Description

Clock interrupt flag register

Fields

LSIRDYF

LSI ready interrupt flag
LSERDYF

LSE ready interrupt flag
HSIRDYF

HSI ready interrupt flag
HSERDYF

HSE ready interrupt flag
PLLSYSRDYF

PLL ready interrupt flag
CSSF

Clock security system interrupt flag
LSECSSF

LSE Clock security system interrupt flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32