stm32 /stm32g0 /STM32G050 /SPI1 /SPI_I2SPR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SPI_I2SPR

MCKOE=B_0x0, ODD=B_0x0

Fields

I2SDIV	I2S linear prescaler I2SDIV [7:0] = 0 or I2SDIV [7:0] = 1 are forbidden values. Refer to . Note: These bits should be configured when the I2S is disabled. They are used only when the I2S is in master mode. They are not used in SPI mode.
ODD	Odd factor for the prescaler Refer to . Note: This bit should be configured when the I2S is disabled. It is used only when the I2S is in master mode. It is not used in SPI mode. 0 (B_0x0): Real divider value is = I2SDIV 2 1 (B_0x1): Real divider value is = (I2SDIV 2)+1
MCKOE	Master clock output enable Note: This bit should be configured when the I2S is disabled. It is used only when the I2S is in master mode. It is not used in SPI mode. 0 (B_0x0): Master clock output is disabled 1 (B_0x1): Master clock output is enabled

Links

()