stm32 /stm32g0 /STM32G061 /AES /AES_DINR

Input data word A four-fold sequential write to this bitfield during the input phase results in writing a complete 128-bit block of input data to the AES peripheral. From the first to the fourth write, the corresponding data weights are [127:96], [95:64], [63:32], and [31:0]. Upon each write, the data from the 32-bit input buffer are handled by the data swap block according to the DATATYPE[1:0] bitfield, then written into the AES core 128-bit input buffer. The data signification of the input data block depends on the AES operating mode:

• Mode 1 (encryption): plaintext
• Mode 2 (key derivation): the bitfield is not used (AES_KEYRx registers used for input)
• Mode 3 (decryption) and Mode 4 (key derivation then single decryption): ciphertext The data swap operation is described in page499.