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stm32 /stm32g0 /STM32G071 /PWR /PUCRD

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Interpret as PUCRD

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PU0)PU0 0 (PU1)PU1 0 (PU2)PU2 0 (PU3)PU3 0 (PU4)PU4 0 (PU5)PU5 0 (PU6)PU6 0 (PU8)PU8 0 (PU9)PU9

Description

Power Port D pull-up control register

Fields

PU0

Port D pull-up bit y (y=0…15)
PU1

Port D pull-up bit y (y=0…15)
PU2

Port D pull-up bit y (y=0…15)
PU3

Port D pull-up bit y (y=0…15)
PU4

Port D pull-up bit y (y=0…15)
PU5

Port D pull-up bit y (y=0…15)
PU6

Port D pull-up bit y (y=0…15)
PU8

Port D pull-up bit y (y=0…15)
PU9

Port D pull-up bit y (y=0…15)

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32