Regviz

stm32 /stm32g0 /STM32G071 /PWR /SCR

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Interpret as SCR

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https://regviz.com/r/stm32/stm32g0/STM32G071/PWR/SCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CWUF1)CWUF1 0 (CWUF2)CWUF2 0 (CWUF4)CWUF4 0 (CWUF5)CWUF5 0 (CWUF6)CWUF6 0 (CSBF)CSBF

Description

Power status clear register

Fields

CWUF1

Clear wakeup flag 1
CWUF2

Clear wakeup flag 2
CWUF4

Clear wakeup flag 4
CWUF5

Clear wakeup flag 5
CWUF6

Clear wakeup flag 6
CSBF

Clear standby flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32