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stm32 /stm32g4 /STM32G473 /FDCAN1 /ILS

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Interpret as ILS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RxFIFO0)RxFIFO0 0 (RxFIFO1)RxFIFO1 0 (SMSG)SMSG 0 (TFERR)TFERR 0 (MISC)MISC 0 (BERR)BERR 0 (PERR)PERR

Description

The Interrupt Line Select register assigns an interrupt generated by a specific interrupt flag from the Interrupt Register to one of the two module interrupt lines. For interrupt generation the respective interrupt line has to be enabled via ILE[EINT0] and ILE[EINT1].

Fields

RxFIFO0

RxFIFO0
RxFIFO1

RxFIFO1
SMSG

SMSG
TFERR

TFERR
MISC

MISC
BERR

BERR
PERR

PERR

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32