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stm32 /stm32g4 /STM32G473 /OPAMP /OPAMP5_TCMR

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Interpret as OPAMP5_TCMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (VMS_SEL)VMS_SEL 0VPS_SEL 0 (T1CM_EN)T1CM_EN 0 (T8CM_EN)T8CM_EN 0 (T20CM_EN)T20CM_EN 0 (LOCK)LOCK

Description

OPAMP5 control/status register

Fields

VMS_SEL

VMS_SEL
VPS_SEL

VPS_SEL
T1CM_EN

T1CM_EN
T8CM_EN

T8CM_EN
T20CM_EN

T20CM_EN
LOCK

LOCK

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32