EXTI7=B_0x0, EXTI5=B_0x0, EXTI6=B_0x0, EXTI4=B_0x0
EXTI external interrupt selection register
| EXTI4 | EXTI4 GPIO port selection These bits are written by software to select the source input for EXTI4 external interrupt. When EXTI_PRIVCFGR.PRIV4 is disabled, EXTI4 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV4 is enabled, EXTI4 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved 0 (B_0x0): PA[4] pin 1 (B_0x1): PB[4] pin 2 (B_0x2): PC[4] pin |
| EXTI5 | EXTI5 GPIO port selection These bits are written by software to select the source input for EXTI5 external interrupt. When EXTI_PRIVCFGR.PRIV5 is disabled, EXTI5 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV5 is enabled, EXTI5 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved 0 (B_0x0): PA[5] pin 1 (B_0x1): PB[5] pin 2 (B_0x2): PC[5] pin |
| EXTI6 | EXTI6 GPIO port selection These bits are written by software to select the source input for EXTI6 external interrupt. When EXTI_PRIVCFGR.PRIV6 is disabled, EXTI6 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV6 is enabled, EXTI6 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved 0 (B_0x0): PA[6] pin 1 (B_0x1): PB[6] pin 2 (B_0x2): PC[6] pin |
| EXTI7 | EXTI7 GPIO port selection These bits are written by software to select the source input for EXTI7 external interrupt. When EXTI_PRIVCFGR.PRIV7 is disabled, EXTI7 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV7 is enabled, EXTI7 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved 0 (B_0x0): PA[7] pin 1 (B_0x1): PB[7] pin 2 (B_0x2): PC[7] pin |