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stm32 /stm32h5 /STM32H503 /I3C1 /I3C_MAXWLR

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Interpret as I3C_MAXWLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MWL

Description

I3C maximum write length register

Fields

MWL

maximum data write length (when I3C is acting as target) This field is initially written by software when I3C_CFGR.EN=0 and updated by hardware on the reception of SETMWL command. Software is notified of a MWL update by the I3C_EVR.MWLUPF and the corresponding interrupt if enabled. This field is used by hardware to return the value on the I3C bus when the target receives a GETMWL CCC.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32