VM_SEL=B_0x0, OPAEN=B_0x0, VP_SEL=B_0x0, PGA_GAIN=B_0x0, OPAHSM=B_0x0, FORCE_VP=B_0x0, CALSEL=B_0x0, CALON=B_0x0, CALOUT=B_0x0, USERTRIM=B_0x0, TSTREF=B_0x0
OPAMP1 control/status register
OPAEN | Operational amplifier Enable Note: If OPAMP1 is unconnected in a specific package, it must remain disabled (keep OPAMP1_CSR register default value). 0 (B_0x0): operational amplifier disabled 1 (B_0x1): operational amplifier enabled |
FORCE_VP | Force internal reference on VP (reserved for test) 0 (B_0x0): Normal operating mode. Non-inverting input connected to inputs. 1 (B_0x1): Calibration verification mode: Non-inverting input connected to calibration reference voltage. |
VP_SEL | Non inverted input selection 0 (B_0x0): GPIO INP0 connected to OPAMP_VINP 1 (B_0x1): dac_out1 connected to OPAMP_VINP 2 (B_0x2): GPIO INP2 is connected to OPAMP_VINP |
VM_SEL | Inverting input selection 0 (B_0x0): INM0 connected to OPAMP_VINM input 1 (B_0x1): INM1 connected to OPAMP_VINM input 2 (B_0x2): Feedback resistor is connected to OPAMP_VINM input (PGA mode), Inverting input selection is depends on the PGA_GAIN setting 3 (B_0x3): opamp_out connected to OPAMP_VINM input (Follower mode) |
OPAHSM | Operational amplifier high-speed mode The operational amplifier must be disable to change this configuration. 0 (B_0x0): operational amplifier in normal mode 1 (B_0x1): operational amplifier in high-speed mode |
CALON | Calibration mode enabled 0 (B_0x0): Normal mode 1 (B_0x1): Calibration mode (all switches opened by HW) |
CALSEL | Calibration selection It is used to select the offset calibration bus used to generate the internal reference voltage when CALON = 1 or FORCE_VP= 1. 0 (B_0x0): 0.033*VDDA applied on OPAMP inputs 1 (B_0x1): 0.1*VDDA applied on OPAMP inputs (for PMOS calibration) 2 (B_0x2): 0.5*VDDA applied on OPAMP inputs 3 (B_0x3): 0.9*VDDA applied on OPAMP inputs (for NMOS calibration) |
PGA_GAIN | Operational amplifier Programmable amplifier gain value 0 (B_0x0): Non-inverting internal Gain 2, VREF- referenced 1 (B_0x1): Non-inverting internal Gain 4, VREF- referenced 2 (B_0x2): Non-inverting internal Gain 8, VREF- referenced 3 (B_0x3): Non-inverting internal Gain 16, VREF- referenced 4 (B_0x4): Non-inverting internal Gain 2 with filtering on INM0, VREF- referenced 5 (B_0x5): Non-inverting internal Gain 4 with filtering on INM0, VREF- referenced 6 (B_0x6): Non-inverting internal Gain 8 with filtering on INM0, VREF- referenced 7 (B_0x7): Non-inverting internal Gain 16 with filtering on INM0, VREF- referenced 8 (B_0x8): Inverting gain=-1/ Non-inverting gain =2 with INM0 node for input or bias 9 (B_0x9): Inverting gain=-3/ Non-inverting gain =4 with INM0 node for input or bias 10 (B_0xA): Inverting gain=-7/ Non-inverting gain =8 with INM0 node for input or bias 11 (B_0xB): Inverting gain=-15/ Non-inverting gain =16 with INM0 node for input or bias 12 (B_0xC): Inverting gain=-1/ Non-inverting gain =2 with INM0 node for input or bias, INM1 node for filtering 13 (B_0xD): Inverting gain=-3/ Non-inverting gain =4 with INM0 node for input or bias, INM1 node for filtering 14 (B_0xE): Inverting gain=-7/ Non-inverting gain =8 with INM0 node for input or bias, INM1 node for filtering 15 (B_0xF): Inverting gain=-15/ Non-inverting gain =16 with INM0 node for input or bias, INM1 node for filtering |
USERTRIM | User trimming enable This bit allows to switch from ‘factory’ AOP offset trimmed values to ‘user’ AOP offset trimmed values This bit is active for both mode normal and high-power. 0 (B_0x0): ‘factory’ trim code used 1 (B_0x1): ‘user’ trim code used |
TSTREF | OPAMP calibration reference voltage output control (reserved for test) 0 (B_0x0): INTVREF of OPAMP is not output 1 (B_0x1): INTVREF of OPAMP is output |
CALOUT | Operational amplifier calibration output OPAMP output status flag. During the calibration mode, OPAMP is used as comparator. 0 (B_0x0): Non-inverting inverting 1 (B_0x1): Non-inverting inverting |