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stm32 /stm32h5 /STM32H503 /PWR /PWR_PMSR

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Interpret as PWR_PMSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)STOPF 0 (B_0x0)SBF

STOPF=B_0x0, SBF=B_0x0

Description

PWR status register

Fields

STOPF

Stop flag This bit is set by hardware and cleared only by any reset or by setting the CSSF bit.

0 (B_0x0): system has not been in Stop mode.

1 (B_0x1): system has been in Stop mode.
SBF

System standby flag This bit is set by hardware and cleared only by a POR or by setting the CSSF bit.

0 (B_0x0): system has not been in Standby mode.

1 (B_0x1): system has been in Standby mode.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32