FLITFLPEN=B_0x0, RAMCFGLPEN=B_0x0, CRCLPEN=B_0x0, SRAM1LPEN=B_0x0, GPDMA1LPEN=B_0x0, BKPRAMLPEN=B_0x0, GPDMA2LPEN=B_0x0, ICACHELPEN=B_0x0
RCC AHB1 sleep clock register
| GPDMA1LPEN | GPDMA1 clock enable during sleep mode Set and reset by software. 0 (B_0x0): GPDMA1 peripheral clock disabled during sleep mode 1 (B_0x1): GPDMA1 peripheral clock enabled during sleep mode (default after reset) |
| GPDMA2LPEN | GPDMA2 clock enable during sleep mode Set and reset by software. 0 (B_0x0): GPDMA2 peripheral clock disabled during sleep mode 1 (B_0x1): GPDMA2 peripheral clock enabled during sleep mode (default after reset) |
| FLITFLPEN | Flash interface (FLITF) clock enable during sleep mode Set and reset by software. 0 (B_0x0): FLITF peripheral clock disabled during sleep mode 1 (B_0x1): FLITF peripheral clock enabled during sleep mode (default after reset) |
| CRCLPEN | CRC clock enable during sleep mode Set and reset by software. 0 (B_0x0): CRC peripheral clock disabled during sleep mode 1 (B_0x1): CRC peripheral clock enabled during sleep mode (default after reset) |
| RAMCFGLPEN | RAMCFG clock enable during sleep mode Set and reset by software. 0 (B_0x0): RAMCFG peripheral clock disabled during sleep mode 1 (B_0x1): RAMCFG peripheral clock enabled during sleep mode (default after reset) |
| BKPRAMLPEN | BKPRAM clock enable during sleep mode Set and reset by software 0 (B_0x0): BKPRAM peripheral clock disabled during sleep mode 1 (B_0x1): BKPRAM peripheral clock enabled during sleep mode (default after reset) |
| ICACHELPEN | ICACHE clock enable during sleep mode Set and reset by software 0 (B_0x0): ICACHE peripheral clock disabled during sleep mode 1 (B_0x1): ICACHE peripheral clock enabled during sleep mode (default after reset) |
| SRAM1LPEN | SRAM1 clock enable during sleep mode Set and reset by software 0 (B_0x0): SRAM1 peripheral clock disabled during sleep mode 1 (B_0x1): SRAM1 peripheral clock enabled during sleep mode (default after reset) |