GPIOCLPEN=B_0x0, SRAM2LPEN=B_0x0, GPIODLPEN=B_0x0, GPIOALPEN=B_0x0, HASHLPEN=B_0x0, GPIOHLPEN=B_0x0, RNGLPEN=B_0x0, DAC12LPEN=B_0x0, GPIOBLPEN=B_0x0, ADC1LPEN=B_0x0
RCC AHB2 sleep clock register
| GPIOALPEN | GPIOA clock enable during sleep mode Set and reset by software. 0 (B_0x0): GPIOA peripheral clock disabled during sleep mode 1 (B_0x1): GPIOA peripheral clock enabled during sleep mode (default after reset) |
| GPIOBLPEN | GPIOB clock enable during sleep mode Set and reset by software. 0 (B_0x0): GPIOB peripheral clock disabled during sleep mode 1 (B_0x1): GPIOB peripheral clock enabled during sleep mode (default after reset) |
| GPIOCLPEN | GPIOC clock enable during sleep mode Set and reset by software. 0 (B_0x0): GPIOC peripheral clock disabled during sleep mode 1 (B_0x1): GPIOC peripheral clock enabled during sleep mode (default after reset) |
| GPIODLPEN | GPIOD clock enable during sleep mode Set and reset by software. 0 (B_0x0): GPIOD peripheral clock disabled during sleep mode 1 (B_0x1): GPIOD peripheral clock enabled during sleep mode (default after reset) |
| GPIOHLPEN | GPIOH clock enable during sleep mode Set and reset by software. 0 (B_0x0): GPIOH peripheral clock disabled during sleep mode 1 (B_0x1): GPIOH peripheral clock enabled during sleep mode (default after reset) |
| ADC1LPEN | ADC1 peripherals clock enable during sleep mode Set and reset by software. 0 (B_0x0): ADC1 peripherals clock disabled during sleep mode 1 (B_0x1): ADC1 peripherals clock enabled during sleep mode (default after reset) |
| DAC12LPEN | DAC clock enable during sleep mode Set and reset by software. 0 (B_0x0): DAC peripheral clock disabled during sleep mode 1 (B_0x1): DAC peripheral clock enabled during sleep mode (default after reset) |
| HASHLPEN | HASH clock enable during sleep mode Set and reset by software. 0 (B_0x0): HASH peripheral clock disabled during sleep mode 1 (B_0x1): HASH peripheral clock enabled during sleep mode (default after reset) |
| RNGLPEN | RNG clock enable during sleep mode Set and reset by software. 0 (B_0x0): RNG peripheral clock disabled during sleep mode 1 (B_0x1): RNG peripheral clock enabled during sleep mode (default after reset) |
| SRAM2LPEN | SRAM2 clock enable during sleep mode Set and reset by software. 0 (B_0x0): SRAM2 peripheral clock disabled during sleep mode 1 (B_0x1): SRAM2 peripheral clock enabled during sleep mode (default after reset) |