RTCAPBEN=B_0x0, VREFEN=B_0x0, I3C2EN=B_0x0, LPUART1EN=B_0x0, LPTIM1EN=B_0x0, SBSEN=B_0x0
RCC APB3 peripheral clock register
| SBSEN | SBS clock enable Set and reset by software. 0 (B_0x0): SBS peripheral clock disabled (default after reset) 1 (B_0x1): SBS peripheral clock enabled |
| LPUART1EN | LPUART1 clock enable Set and reset by software. 0 (B_0x0): LPUART1 peripheral clock disabled (default after reset) 1 (B_0x1): LPUART1 peripheral clock enabled |
| I3C2EN | I3C2EN clock enable Set and reset by software. 0 (B_0x0): I3C2EN peripheral clock disabled (default after reset) 1 (B_0x1): I3C2EN peripheral clock enabled |
| LPTIM1EN | LPTIM1 clock enable Set and reset by software. 0 (B_0x0): LPTIM1 peripheral clock disabled (default after reset) 1 (B_0x1): LPTIM1 peripheral clock enabled |
| VREFEN | VREF clock enable Set and reset by software. 0 (B_0x0): VREF peripheral clock disabled (default after reset) 1 (B_0x1): VREF peripheral clock enabled |
| RTCAPBEN | RTC APB interface clock enable Set and reset by software. 0 (B_0x0): RTC APB interface clock disabled (default after reset) 1 (B_0x1): RTC APB interface clock enabled |