USART2SEL=B_0x0, USART1SEL=B_0x0, TIMICSEL=B_0x0, USART3SEL=B_0x0
RCC kernel clock configuration register
| USART1SEL | USART1 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): rcc_pclk2 selected as kernel clock (default after reset) 1 (B_0x1): pll2_q_ck selected as kernel clock 3 (B_0x3): hsi_ker_ck selected as kernel clock 4 (B_0x4): csi_ker_ck selected as kernel clock 5 (B_0x5): lse_ck selected as kernel clock |
| USART2SEL | USART2 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): rcc_pclk1 selected as kernel clock (default after reset) 1 (B_0x1): pll2_q_ck selected as kernel clock 3 (B_0x3): hsi_ker_ck selected as kernel clock 4 (B_0x4): csi_ker_ck selected as kernel clock 5 (B_0x5): lse_ck selected as kernel clock |
| USART3SEL | USART3 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): rcc_pclk1 selected as kernel clock (default after reset) 1 (B_0x1): pll2_q_ck selected as kernel clock 3 (B_0x3): hsi_ker_ck selected as kernel clock 4 (B_0x4): csi_ker_ck selected as kernel clock 5 (B_0x5): lse_ck selected as kernel clock |
| TIMICSEL | TIM2, TIM3 and LPTIM2 input capture source selection Set and reset by software. 0 (B_0x0): No internal clock available for timers input capture (default after reset) 1 (B_0x1): hsi_ker_ck/1024, hsi_ker_ck/8 and csi_ker_ck/128 selected for timers input capture |