stm32 /stm32h5 /STM32H503 /RCC /RCC_CCIPR2

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Interpret as RCC_CCIPR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LPTIM1SEL 0 (B_0x0)LPTIM2SEL

LPTIM2SEL=B_0x0, LPTIM1SEL=B_0x0

Description

RCC kernel clock configuration register

Fields

LPTIM1SEL

LPTIM1 kernel clock source selection others: reserved, the kernel clock is disabled

0 (B_0x0): rcc_pclk3 selected as kernel clock (default after reset)

1 (B_0x1): pll2_p_ck selected as kernel clock

3 (B_0x3): lse_ker_ck selected as kernel clock

4 (B_0x4): lsi_ker_ck selected as kernel clock

5 (B_0x5): per_ck selected as kernel clock

LPTIM2SEL

LPTIM2 kernel clock source selection others: reserved, the kernel clock is disabled

0 (B_0x0): rcc_pclk1 selected as kernel clock (default after reset)

1 (B_0x1): pll2_p_ck selected as kernel clock

3 (B_0x3): lse_ker_ck selected as kernel clock

4 (B_0x4): lsi_ker_ck selected as kernel clock

5 (B_0x5): per_ck selected as kernel clock

Links

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