SPI2SEL=B_0x0, LPUART1SEL=B_0x0, SPI1SEL=B_0x0, SPI3SEL=B_0x0
RCC kernel clock configuration register
SPI1SEL | SPI1 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): pll1_q_ck selected as kernel clock (default after reset) 1 (B_0x1): pll2_p_ck selected as kernel clock 3 (B_0x3): AUDIOCLK selected as kernel clock 4 (B_0x4): per_ck selected as kernel clock |
SPI2SEL | SPI2 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): pll1_q_ck selected as kernel clock (default after reset) 1 (B_0x1): pll2_p_ck selected as kernel clock 3 (B_0x3): AUDIOCLK selected as kernel clock 4 (B_0x4): per_ck selected as kernel clock |
SPI3SEL | SPI3 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): pll1_q_ck selected as kernel clock (default after reset) 1 (B_0x1): pll2_p_ck selected as kernel clock 3 (B_0x3): AUDIOCLK selected as kernel clock 4 (B_0x4): per_ck selected as kernel clock |
LPUART1SEL | LPUART1 kernel clock source selection others: reserved, the kernel clock is disabled 0 (B_0x0): rcc_pclk3 s elected as kernel clock (default after reset) 1 (B_0x1): pll2_q_ck selected as kernel clock 3 (B_0x3): hsi_ker_ck selected as kernel clock 4 (B_0x4): csi_ker_ck selected as kernel clock 5 (B_0x5): lse_ck selected as kernel clock |