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stm32 /stm32h5 /STM32H503 /SBS /SBS_CCSWCR

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Interpret as SBS_CCSWCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SW_ANSRC1 0SW_APSRC1 0SW_ANSRC2 0SW_APSRC2

Description

SBS compensation cell for I/Os software code register

Fields

SW_ANSRC1

NMOS compensation code for VDD power rails This bitfield is written by software to define an I/O compensation cell code for NMOS transistors of the VDD power rail. This code is applied to the I/O when CS1 is set in SBS_CCSR.
SW_APSRC1

PMOS compensation code for the VDD power rails This bitfield is written by software to define an I/O compensation cell code for PMOS transistors of the VDDIO power rail. This code is applied to the I/O when CS1 is set in SBS_CCSR.
SW_ANSRC2

NMOS compensation code for VDDIO power rails This bitfield is written by software to define an I/O compensation cell code for NMOS transistors of the VDD power rail. This code is applied to the I/O when CS2 is set in SBS_CCSR.
SW_APSRC2

PMOS compensation code for the V DDIO power rails This bitfield is written by software to define an I/O compensation cell code for PMOS transistors of the VDDIO power rail. This code is applied to the I/O when CS2 is set in SBS_CCSR.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32