Regviz

stm32 /stm32h5 /STM32H523 /ADC /ADC_OR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ADC_OR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h5/STM32H523/ADC/ADC_OR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)OP0

OP0=B_0x0

Description

ADC option register

Fields

OP0

Option bit 0

0 (B_0x0): Vless thansub>DDCORE less than/sub>channel disabled

1 (B_0x1): Vless thansub>DDCORE less than/sub>channel enabled

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32