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stm32 /stm32h5 /STM32H523 /DAC /DAC_SHHR

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Interpret as DAC_SHHR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0THOLD10THOLD2

Description

DAC sample and hold time register

Fields

THOLD1

DAC channel1 hold time (only valid in Sample and hold mode)
THOLD2

DAC channel2 hold time (only valid in Sample and hold mode).

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32