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stm32 /stm32h5 /STM32H523 /DCACHE /DCACHE_FCR

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Interpret as DCACHE_FCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CBSYENDF 0 (B_0x0)CERRF 0 (B_0x0)CCMDENDF

CERRF=B_0x0, CBSYENDF=B_0x0, CCMDENDF=B_0x0

Description

DCACHE flag clear register

Fields

CBSYENDF

clear full invalidate busy end flag

0 (B_0x0): no effect

1 (B_0x1): clears BSYENDF flag in DCACHE_SR
CERRF

clear cache error flag

0 (B_0x0): no effect

1 (B_0x1): clears ERRF flag in DCACHE_SR
CCMDENDF

clear command end flag

0 (B_0x0): no effect

1 (B_0x1): clears CMDENDF flag in DCACHE_SR

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32