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stm32 /stm32h5 /STM32H523 /FLASH /FLASH_ECCCORR

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Interpret as FLASH_ECCCORR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADDR_ECC0 (OBK_ECC)OBK_ECC 0 (EDATA_ECC)EDATA_ECC 0 (BK_ECC)BK_ECC 0 (SYSF_ECC)SYSF_ECC 0 (OTP_ECC)OTP_ECC 0 (B_0x0)ECCCIE 0 (ECCC)ECCC

ECCCIE=B_0x0

Description

FLASH ECC correction register

Fields

ADDR_ECC

ECC error address
OBK_ECC

Single ECC error corrected in flash OB Keys storage area.
EDATA_ECC

ECC fail for corrected ECC error in flash high-cycle data area
BK_ECC

ECC fail bank for corrected ECC error
SYSF_ECC

ECC fail for corrected ECC error in system flash memory
OTP_ECC

OTP ECC error bit
ECCCIE

ECC single correction error interrupt enable bit

0 (B_0x0): no interrupt generated when an ECC single correction error occurs

1 (B_0x1): non-secure interrupt generated when an ECC single correction error occurs
ECCC

ECC correction set by hardware when single ECC error has been detected and corrected.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32