stm32 /stm32h5 /STM32H523 /HASH /HASH_CR

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Interpret as HASH_CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (INIT)INIT 0 (B_0x0)DMAE 0 (B_0x0)DATATYPE 0 (B_0x0)MODE 0NBW0 (DINNE)DINNE 0 (B_0x0)MDMAT 0 (B_0x0)LKEY 0 (B_0x0)ALGO

MODE=B_0x0, DMAE=B_0x0, LKEY=B_0x0, ALGO=B_0x0, MDMAT=B_0x0, DATATYPE=B_0x0

Description

HASH control register

Fields

INIT

Initialize message digest calculation

DMAE

DMA enable

0 (B_0x0): DMA transfers disabled

1 (B_0x1): DMA transfers enabled.

DATATYPE

Data type selection

0 (B_0x0): 32-bit data.

1 (B_0x1): 16-bit data or half-word.

2 (B_0x2): 8-bit data or bytes.

3 (B_0x3): bit data or bit string.

MODE

Mode selection

0 (B_0x0): Hash mode selected

1 (B_0x1): HMAC mode selected.

NBW

Number of words already pushed

DINNE

DIN not empty

MDMAT

Multiple DMA transfers

0 (B_0x0): DCAL is automatically set at the end of a DMA transfer.

1 (B_0x1): DCAL is not automatically set at the end of a DMA transfer.

LKEY

Long key selection

0 (B_0x0): HMAC key is shorter or equal to the block size (short key).

1 (B_0x1): HMAC key is longer than the block size (long key).

ALGO

Algorithm selection

0 (B_0x0): SHA-1

2 (B_0x2): SHA2-224

3 (B_0x3): SHA2-256

12 (B_0xC): SHA2-384

13 (B_0xD): SHA2-512/224

14 (B_0xE): SHA2-512/256

15 (B_0xF): SHA2-512

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