stm32 /stm32h5 /STM32H523 /OCTOSPI /OCTOSPI_HLCR

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Interpret as OCTOSPI_HLCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LM 0 (B_0x0)WZL 0TACC0TRWR

LM=B_0x0, WZL=B_0x0

Description

OCTOSPI HyperBus latency configuration register

Fields

LM

Latency mode

0 (B_0x0): Variable initial latency

1 (B_0x1): Fixed latency

WZL

Write zero latency

0 (B_0x0): Latency on write accesses

1 (B_0x1): No latency on write accesses

TACC

Access time

TRWR

Read-write minimum recovery time

Links

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