PSSI_MIS

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Interpret as PSSI_MIS

OVR_MIS=B_0x0

PSSI masked interrupt status register

OVR_MIS

Data buffer overrun/underrun masked interrupt status

0 (B_0x0): No interrupt is generated when an overrun/underrun error occurs

1 (B_0x1): An interrupt is generated if there is either an overrun or an underrun error and the OVR_IE bit is set in PSSI_IER.

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