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stm32 /stm32h5 /STM32H523 /RAMCFG /RAMCFG_M1ISR

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Interpret as RAMCFG_M1ISR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SEDC 0 (B_0x0)DED 0 (B_0x0)SRAMBUSY

SEDC=B_0x0, DED=B_0x0, SRAMBUSY=B_0x0

Description

RAMCFG memory interrupt status register

Fields

SEDC

ECC single error detected and corrected

0 (B_0x0): No single error

1 (B_0x1): Single error detected and corrected
DED

ECC double error detected

0 (B_0x0): No double error

1 (B_0x1): Double error detected
SRAMBUSY

SRAM busy with erase operation

0 (B_0x0): No erase operation on going

1 (B_0x1): Erase operation on going

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32