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stm32 /stm32h5 /STM32H523 /RAMCFG /RAMCFG_M5IER

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Interpret as RAMCFG_M5IER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SEIE 0 (B_0x0)DEIE 0 (B_0x0)ECCNMI

SEIE=B_0x0, DEIE=B_0x0, ECCNMI=B_0x0

Description

RAMCFG memory 5 interrupt enable register

Fields

SEIE

ECC single error interrupt enable

0 (B_0x0): Single error interrupt disabled

1 (B_0x1): Single error interrupt enabled
DEIE

ECC double error interrupt enable

0 (B_0x0): Double error interrupt disabled

1 (B_0x1): Double error interrupt enabled
ECCNMI

Double error NMI

0 (B_0x0): NMI not generated in case of ECC double error

1 (B_0x1): NMI generated in case of ECC double error

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32