TIM6LPEN=B_0x0, TIM3LPEN=B_0x0, CRSLPEN=B_0x0, TIM7LPEN=B_0x0, UART7LPEN=B_0x0, USART2LPEN=B_0x0, CECLPEN=B_0x0, USART6LPEN=B_0x0, UART5LPEN=B_0x0, TIM2LPEN=B_0x0, UART8LPEN=B_0x0, USART10LPEN=B_0x0, TIM4LPEN=B_0x0, UART4LPEN=B_0x0, TIM12LPEN=B_0x0, SPI2LPEN=B_0x0, USART11LPEN=B_0x0, I2C1LPEN=B_0x0, SPI3LPEN=B_0x0, I2C2LPEN=B_0x0, WWDGLPEN=B_0x0, USART3LPEN=B_0x0, I3C1LPEN=B_0x0, TIM5LPEN=B_0x0
RCC APB1 sleep clock register
| TIM2LPEN | TIM2 clock enable during Sleep mode 0 (B_0x0): TIM2 peripheral clock disabled during Sleep mode 1 (B_0x1): TIM2 peripheral clock enabled during Sleep mode (default after reset) |
| TIM3LPEN | TIM3 clock enable during Sleep mode 0 (B_0x0): TIM3 peripheral clock disabled during Sleep mode 1 (B_0x1): TIM3 peripheral clock enabled during Sleep mode (default after reset) |
| TIM4LPEN | TIM4 clock enable during Sleep mode 0 (B_0x0): TIM4 peripheral clock disabled during Sleep mode 1 (B_0x1): TIM4 peripheral clock enabled during Sleep mode (default after reset) |
| TIM5LPEN | TIM5 clock enable during Sleep mode 0 (B_0x0): TIM5 peripheral clock disabled during Sleep mode 1 (B_0x1): TIM5 peripheral clock enabled during Sleep mode (default after reset) |
| TIM6LPEN | TIM6 clock enable during Sleep mode 0 (B_0x0): TIM6 peripheral clock disabled during Sleep mode 1 (B_0x1): TIM6 peripheral clock enabled during Sleep mode (default after reset) |
| TIM7LPEN | TIM7 clock enable during Sleep mode 0 (B_0x0): TIM7 peripheral clock disabled during Sleep mode 1 (B_0x1): TIM7 peripheral clock enabled during Sleep mode (default after reset) |
| TIM12LPEN | TIM12 clock enable during Sleep mode 0 (B_0x0): TIM12 peripheral clock disabled during Sleep mode 1 (B_0x1): TIM12 peripheral clock enabled during Sleep mode (default after reset) |
| WWDGLPEN | WWDG clock enable during Sleep mode 0 (B_0x0): WWDG peripheral clock disabled during Sleep mode 1 (B_0x1): WWDG peripheral clock enabled during Sleep mode (default after reset) |
| SPI2LPEN | SPI2 clock enable during Sleep mode 0 (B_0x0): SPI2 peripheral clock disabled during Sleep mode 1 (B_0x1): SPI2 peripheral clock enabled during Sleep mode (default after reset) |
| SPI3LPEN | SPI3 clock enable during Sleep mode 0 (B_0x0): SPI3 peripheral clock disabled during Sleep mode 1 (B_0x1): SPI3 peripheral clock enabled during Sleep mode (default after reset) |
| USART2LPEN | USART2 clock enable during Sleep mode 0 (B_0x0): USART2 peripheral clock disabled during Sleep mode 1 (B_0x1): USART2 peripheral clock enabled during Sleep mode (default after reset) |
| USART3LPEN | USART3 clock enable during Sleep mode 0 (B_0x0): USART3 peripheral clock disabled during Sleep mode 1 (B_0x1): USART3 peripheral clock enabled during Sleep mode (default after reset) |
| UART4LPEN | UART4 clock enable during Sleep mode 0 (B_0x0): UART4 peripheral clock disabled during Sleep mode 1 (B_0x1): UART4 peripheral clock enabled during Sleep mode (default after reset) |
| UART5LPEN | UART5 clock enable during Sleep mode 0 (B_0x0): UART5 peripheral clock disabled during Sleep mode 1 (B_0x1): UART5 peripheral clock enabled during Sleep mode (default after reset) |
| I2C1LPEN | I2C1 clock enable during Sleep mode 0 (B_0x0): I2C1 peripheral clock disabled during Sleep mode 1 (B_0x1): I2C1 peripheral clock enabled during Sleep mode (default after reset) |
| I2C2LPEN | I2C2 clock enable during Sleep mode 0 (B_0x0): I2C2 peripheral clock disabled during Sleep mode 1 (B_0x1): I2C2 peripheral clock enabled during Sleep mode (default after reset) |
| I3C1LPEN | I3C1 clock enable during Sleep mode 0 (B_0x0): I3C1 peripheral clock disabled during Sleep mode 1 (B_0x1): I3C1 peripheral clock enabled during Sleep mode (default after reset) |
| CRSLPEN | CRS clock enable during Sleep mode 0 (B_0x0): CRS peripheral clock disabled during Sleep mode 1 (B_0x1): CRS peripheral clock enabled during Sleep mode (default after reset) |
| USART6LPEN | USART6 clock enable during Sleep mode 0 (B_0x0): USART6 peripheral clock disabled during Sleep mode 1 (B_0x1): USART6 peripheral clock enabled during Sleep mode (default after reset) |
| USART10LPEN | USART10 clock enable during Sleep mode 0 (B_0x0): USART10 peripheral clock disabled during Sleep mode 1 (B_0x1): USART10 peripheral clock enabled during Sleep mode (default after reset) |
| USART11LPEN | USART11 clock enable during Sleep mode 0 (B_0x0): USART11 peripheral clock disabled during Sleep mode 1 (B_0x1): USART11 peripheral clock enabled during Sleep mode (default after reset) |
| CECLPEN | HDMI-CEC clock enable during Sleep mode 0 (B_0x0): HDMI-CEC peripheral clock disabled during Sleep mode 1 (B_0x1): HDMI-CEC peripheral clock enabled during Sleep mode (default after reset) |
| UART7LPEN | UART7 clock enable during Sleep mode 0 (B_0x0): UART7 peripheral clock disabled during Sleep mode 1 (B_0x1): UART7 peripheral clock enabled during Sleep mode (default after reset) |
| UART8LPEN | UART8 clock enable during Sleep mode 0 (B_0x0): UART8 peripheral clock disabled during Sleep mode 1 (B_0x1): UART8 peripheral clock enabled during Sleep mode (default after reset) |